Line-edge roughness in sub-0.18-μm resist patterns

We have characterized line-edge roughness in single-layer, top-surface imaging, bilayer and trilayer resist schemes. The results indicate that in dry developed resists there is inherent line-edge roughness which results from the etch mask, resist (planarizing layer) erosion, and their dependence on plasma etch conditions. In top surface imaging the abruptness of the etch mask, i.e., the silylation contrast, and the silicon content in the silylated areas are the most significant contributors to line-edge roughness. Nevertheless, even in the case of a trilayer, where the SiO₂ layer represents the near ideal mask, there is still resist sidewall roughness of the planarizing layer observed which is plasma induced and polymer dependent. The mechanism and magnitude of line-edge roughness are different for different resist schemes, and require specific optimization. Plasma etching of silicon, like O₂ dry development, contributes to the final line-edge roughness of patterned features.