歪斜
比较器
电子工程
发射机
均衡(音频)
CMOS芯片
收发机
计算机科学
自适应均衡器
频率偏移
电气工程
工程类
电信
正交频分复用
电压
解码方法
频道(广播)
作者
James Jaussi,Ganesh Balamurugan,David R. Johnson,Bryan Casper,Aaron Martin,James J. Kennedy,Naresh R. Shanbhag,R. Mooney
出处
期刊:IEEE Journal of Solid-state Circuits
[Institute of Electrical and Electronics Engineers]
日期:2005-01-01
卷期号:40 (1): 80-88
被引量:78
标识
DOI:10.1109/jssc.2004.838009
摘要
A source-synchronous I/O link with adaptive receiver-side equalization has been implemented in 0.13-/spl mu/m bulk CMOS technology. The transceiver is optimized for small area (360 /spl mu/m /spl times/ 360 /spl mu/m) and low power (280 mW). The analog equalizer is implemented as an 8-way interleaved, 4-tap discrete-time linear filter. The equalization improved the data rate of a 102 cm backplane interconnect by 110%. On-die adaptive logic determines optimal receiver settings through comparator offset cancellation, data alignment of the transmitter and receiver, clock de-skew and setting filter coefficients for equalization. The noise-margin degradation due to statistical variation in converged coefficient values was less than 3%.
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