弯曲
弯曲半径
材料科学
压力(语言学)
可靠性(半导体)
基质(水族馆)
数码产品
制作
柔性电子器件
复合材料
结构工程
光电子学
电气工程
工程类
替代医学
功率(物理)
地质学
病理
哲学
物理
海洋学
医学
量子力学
语言学
作者
Kartik Sondhi,Sai Guruva Reddy Avuthu,Jörg Richstein,Z. Hugh Fan,Toshikazu Nishida
出处
期刊:Flexible and printed electronics
[IOP Publishing]
日期:2021-03-02
卷期号:6 (2): 025001-025001
被引量:1
标识
DOI:10.1088/2058-8585/abeb58
摘要
Abstract Flexible hybrid electronics (FHE) have been gaining interest in recent years as this technology has the potential to become a low-cost, mechanically pliable sister technology for multilayer printed circuit boards (PCBs). One of the limitations of rigid PCB is low endurance to mechanical bending, this limitation poses a threat to the efficacy for wearable applications. During bending, a substrate experiences both compressive and tensile stress. These stresses are similar in magnitude but opposite in direction. This difference in directionality creates a non-linear stress gradient in a via which impacts the structural integrity, endurance and bending reliability of a circuit during its operation. Additionally, as flexible substrates can be bent to a higher bending radius, the magnitude of maximum extrinsic stresses observed on flexible substrates could be higher than the stress observed on rigid substrates. Hence, the reliability and mechanical compliance of through-hole-plastic-vias for reliable flexible circuits need to be understood. In this study, we have developed a process to create vias on flexible substrates using a rapid commercial laser (Nd-YaG laser) to study the effects on via resistance due to three different variables—bending stresses, via diameter and via length. A novel non-destructive approach (CT-scanner) was used to scan the via structures and determine the filling for all via diameters from 50 to 450 µ m and via lengths of 7, 10 mils. Two different configurations of vias were used to measure and analyze the effect of mechanical cycling on via resistance and via filling. This demonstration of electrical and mechanical testing of vias and novel methodologies for via filling, and via electrical resistance can contribute to better design and fabrication guidelines of multi-layer FHE circuits.
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