An Investigation in DC-link Film Capacitors for reduced Parasitic Inductances

Due to the establishment of Wide Bandgap semiconductors, a clear trend towards high power density and increasing switching speed can be observed. With respect to the passive components, the requirements small size and low parasitic inductance are becoming increasingly important. In this paper, an electromagnetic modelling approach of DC-link film capacitors is presented which enables the analysis of main construction parameters for capacitors in power electronics. A simulative investigation using Ansys Q3D assisted by an analytical approach is used to derive design guidelines for low inductive capacitors. The results are considered to develop low-inductive concepts of DC-link film capacitors which achieve values of 3 nH and less. The detailed analysis gives a closer look to main parasitic design parameters of capacitors and yields possibilities for a significant reduction of the inductance of DC-link film capacitors leading to a small parasitic inductance for fast switching applications.