Resist shrinkage during development: rigorous simulations and first compact model for OPC

We have previously reported the exact convolution-based analytical solution to the problem of an elastic resist shrinkage during post-exposure baking (PEB). In contrast to the PEB problem, the elastic shrinking during development in general does not admit a strict analytical solution. Here we use a numerical finite element method (FEM) to compare a two-step development/shrinking model to the results of simultaneously solving full set of the development equations with the elastic deformations being accounted for. We also report existence of a strict analytical solution for the shrinking of line and space resist patterns; this constitutes a special 2D shrinking case. The results of analytical and numerical solutions are compared, and are shown to agree. In the final section we formulate novel Elastic Compact Model (ECM) that mechanistically captures shrink-induced biases for the resist walls of arbitrary 2D resist patterns. The model is fast and can be used for the full-chip optical proximity corrections (OPC). The accuracy of ECM is analyzed using typical OPC layouts by comparing to FEM results, rigorous simulations, and SEM measurements.