浅沟隔离
绝缘体上的硅
单光子雪崩二极管
CMOS芯片
MOSFET
瞬态(计算机编程)
光电子学
雪崩二极管
电子工程
二极管
雪崩光电二极管
物理
计算机科学
沟槽
材料科学
电压
电气工程
硅
探测器
工程类
击穿电压
晶体管
纳米技术
操作系统
图层(电子)
作者
Dylan Issartel,Shuai Gao,Svein Thore Hagen,Patrick Pittet,R. Cellier,Dominique Golanski,Andreia Cathelin,Françis Calmon
标识
DOI:10.1109/eurosoi-ulis53016.2021.9560679
摘要
This article presents a study of Single Photon Avalanche Diodes (SPAD) implemented in 28nm Fully Depleted Silicon-On-Insulator (FD-SOI) CMOS technology based on transient TCAD simulations. The integration of SPAD in this technology is currently being studied. This work allows for a better understanding of the mechanism behind the quite high Dark Count Rate (DCR) measured at relative low excess bias voltages with the previous FD-SOI SPAD design. In this study, TCAD transient simulation methodology is introduced to better understand SPAD behavior during the avalanche process. TCAD simulations revealed that Shallow Trench Isolation (STI) structures in the active area have a negative effect on avalanche quenching, because of slower carrier evacuation with possible occurrence of secondary avalanches in series. Based on this analysis, we propose a new SPAD architecture to achieve a lower DCR.
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