Effect of sputtering process parameters on the uniformity of copper film deposited in micro-via

材料科学 溅射 溅射沉积 蚀刻(微加工) 沉积(地质) 光电子学 高功率脉冲磁控溅射 复合材料 薄膜 冶金 纳米技术 图层(电子) 古生物学 沉积物 生物
作者
Zhouping Yin,Shisheng Lin,Zhiqiang Fu,Yao Wang,Chuan Hu,Yi‐Ching Su
出处
期刊:Journal of materials research and technology [Elsevier]
卷期号:25: 5249-5259 被引量:1
标识
DOI:10.1016/j.jmrt.2023.06.243
摘要

With the increase of the density of interconnecting technology for chip packaging, it is required to form smaller vertical interconnect micro-via in insulating dielectric materials with advanced packaging technology. However, a continuous and uniform copper film cannot be formed on the sidewall of the micro-via after plasma etching due to the existence of the top and bottom cut value. This paper has developed an interconnecting process for depositing copper film in 5-10 μm polyimide micro-via based on DC magnetron sputtering technology and investigated the effect of sputtering process parameters on the uniformity of copper film deposited in micro-via. It is found that sputtering power, bias voltage and working pressure have a great influence on the uniformity of the deposited copper film at the sidewall of the micro-via, and these parameters will lead to the deposition gap. In contrast, the rotating speed and deposition time have little influence on the uniformity of copper film deposited on the micro-via, and there is no undeposited phenomenon on the side wall of the micro-via. When sputtering power is 50 W, bias voltage is -70 V, working pressure is 4 mtorr, rotating speed is 10 rpm, and deposition time 5000 s, the wall, bottom and top of the micro-via are covered by continuous copper film, and the copper film on the sidewall is continuous and homogeneous. The optimized process parameters can be sputtered in the micro-via with a diameter of 5-10 um.
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