可靠性(半导体)
晶体管
占空比
降级(电信)
期限(时间)
拓扑(电路)
压力(语言学)
功率(物理)
电气工程
电子工程
电压
计算机科学
材料科学
数学
工程类
物理
量子力学
哲学
语言学
作者
Giuseppe Capasso,Mauro Zanuccoli,Andrea Natale Tallarico,C. Fiegna
标识
DOI:10.1109/ted.2023.3318865
摘要
This article presents an in-circuit approach to assess the long-term reliability of enhancement-mode GaN HEMTs. A synchronous buck converter conceived for the on-board transistors’ characterization is proposed. Here, high-side and low-side power transistors operate under realistic stress conditions, whereas their degradation is assessed by measuring, in-circuit, the full ${I}$ – ${V}$ characteristics at prefixed stress times. Moreover, a long-term reliability analysis of commercial 80-V GaN HEMTs is reported. Threshold voltage and ON-state resistance degradation induced by the buck converter operation is investigated, as well as their dependencies on the input voltage, duty cycle, ambient temperature, and output current. Results highlight a clear difference compared to standard dc-stress and reveal a strong correlation between the degradation of the high-side transistor and the input voltage. On the contrary, the low-side transistor degradation is almost insensitive to the different operating regimes of the power converter.
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