A Novel Confined Nitride-Trapping Layer Device for 3-D NAND Flash With Robust Retention Performances

A novel confined nitride (SiN) charge trapping 3-D NAND flash with excellent postcycling retention performances was demonstrated. Using a uniform sidewall lateral recess in the 3-D stack followed by a SiN pull-back process to isolate the SiN trapping layer in a self-aligned way is critical to facilitate this structure. Lower erase saturation <; -4 V was shown in the confined SiN cell because of discrete SiN along the Z-direction. Therefore, this structure is in favor of the larger memory window (>10 V) design. Random telegraph noise (RTN) characteristics are comparable to the traditional 3-D NAND device with <; 0.1-V variation. Excellent single-level cell (SLC) retention with only ~600-mV charge loss after 125 °C one-week high-temperature baking for a post-1K-cycled device was obtained. It is far superior to the control sample without a confined SiN structure. Arrhenius analysis at various baking temperatures shows that the retention may pass >100 years at 60 °C and even longer at room temperature. Moreover, superior post-1K-cycled multilevel cell (MLC) retention was also illustrated, which even sustains 150 °C and one-week baking. Therefore, the device has the potential to meet the low-cost long-retention archive memory applications.