现场可编程门阵列
逻辑块
控制重构
计算机科学
可编程逻辑器件
嵌入式系统
熵(时间箭头)
逻辑综合
复杂可编程逻辑器件
钥匙(锁)
实施
可编程逻辑阵列
块(置换群论)
逻辑门
计算机体系结构
算法
数学
操作系统
程序设计语言
物理
几何学
量子力学
作者
Stefan Gehrer,Georg Sigl
标识
DOI:10.1109/isicir.2014.7029535
摘要
Implementing Physically Unclonable Functions (PUFs) on FPGAs is quite inefficient in terms of resource usage. Many logic and routing resources that could serve as entropy sources remain unused. We introduce a method that uses the partial reconfiguration ability of modern FPGAs as a way to maximize the entropy that can be extracted out of a logic block. Different implementations and types of PUFs can be reprogrammed on the same logic blocks and each of their outputs used as an individual partial key. We show with a first implementation that up to six PUFs can be used on the same logic block on a Xilinx Zynq. The correlation between the PUF outputs remains very small, so that the area needed for the same length of PUF response can be shrunk up to 83%.
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