Design A 65nm CMOS Wideband Low Noise Amplifier

In this paper, a cascode low noise amplifier (LNA) is designed and based on 65nm CMOS process for 51-68 GHz wideband application. In this design, the wideband input impedance matching is achieved through a parallel feedback resistor in conjunction with a π-match network, which can also reduce the noise Figure (NF) of the whole circuit effectively. A high flat gain in the wideband is achieved and noise is suppressed by a peaking inductor, which is added to the drain of the cascode. The simulation results show that the 51-68 GHz UBW LNA achieves a high flat gain of 21.36 (± 0.22dB), a noise Figure (NF) of 2.32-3.42dB, the S 11 batter than -14dB across the whole operating frequency band, and the linearity simulation shows the IIP3 of -2.78dBm.