Low Temperature Selective Epitaxy of Group-IV Semiconductors for Nanoelectronics

We have evaluated low temperature epitaxy (LTE) of Phosphorous doped Si (Si:P) and Boron doped SiGe (SiGe:B) on Si(001) substrates. The benefit of LTE is very significant, enabling incorporation of high levels of active dopant for both p- and n-type layers. This translates into lower resistivity compared to layers grown at higher temperature. However, several challenges appear when epitaxy occurs at low temperature (e.g., <500ºC): (i) low growth rate; (ii) loss of selectivity and (iii) crystallinity degradation, particularly on non-(001) surfaces. To overcome these issues, careful selection of precursors and optimization of process conditions is required. In this work, we discuss layer properties obtained on blanket Si(001) wafers. We have also evaluated the most promising SiGe:B growth conditions on patterned nanosheet structures, where the layer was shown to be selective towards SiN and SiO 2 and crystalline growth was realized on Si(110) nanosheet sidewalls. Finally, selective process layer uniformity and wafer-to-wafer reproducibility were assessed over twenty Si(001) wafers showing excellent layer uniformity and wafer-to-wafer repeatability.