三极管
石墨烯
肖特基势垒
光电子学
材料科学
硅
二极管
工作职能
晶体管
逆变器
薄脆饼
肖特基二极管
纳米技术
电气工程
工程类
电容器
电压
图层(电子)
作者
Heejun Yang,Jinseong Heo,Seongjun Park,Hyun Jae Song,David H. Seo,Kyung‐Eun Byun,Philip Kim,In-Kyeong Yoo,Hyun‐Jong Chung,Kinam Kim
出处
期刊:Science
[American Association for the Advancement of Science (AAAS)]
日期:2012-05-18
卷期号:336 (6085): 1140-1143
被引量:900
标识
DOI:10.1126/science.1220527
摘要
Despite several years of research into graphene electronics, sufficient on/off current ratio I(on)/I(off) in graphene transistors with conventional device structures has been impossible to obtain. We report on a three-terminal active device, a graphene variable-barrier "barristor" (GB), in which the key is an atomically sharp interface between graphene and hydrogenated silicon. Large modulation on the device current (on/off ratio of 10(5)) is achieved by adjusting the gate voltage to control the graphene-silicon Schottky barrier. The absence of Fermi-level pinning at the interface allows the barrier's height to be tuned to 0.2 electron volt by adjusting graphene's work function, which results in large shifts of diode threshold voltages. Fabricating GBs on respective 150-mm wafers and combining complementary p- and n-type GBs, we demonstrate inverter and half-adder logic circuits.
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