物理不可克隆功能
环形振荡器
多路复用器
现场可编程门阵列
计算机科学
嵌入式系统
限制
逻辑综合
逻辑门
计算机硬件
电子工程
多路复用
仲裁人
工程类
算法
电信
机械工程
CMOS芯片
作者
Yijun Cui,Chenghua Wang,Weiqiang Liu,Yifei Yu,Máire O’Neill,Fabrizio Lombardi
标识
DOI:10.1109/iscas.2016.7527301
摘要
The physical unclonable function (PUF) produces die-unique responses and is regarded as an emerging security primitive that can be used for authentication of devices. The complexity of a conventional PUF design based on a ring oscillator (RO) is rather high, so limiting its use in many applications. The configurable ring oscillator (CRO) PUF has been advocated as a possible solution to this issue. In this paper, a low hardware complexity CRO PUF design with an enhanced capability to generate a large number of bit responses is proposed; only an inverter and a multiplexer are used in each delay unit. The responses are generated by considering the variation due to fabrication of the logic gates and wires in the CROs. A novel comparison strategy is proposed for the generation of the responses. The proposed PUF design is implemented on Xilinx Spartan-6 FPGAs. These results show that the proposed CRO PUF design has good uniqueness; moreover, it is also robust in its operation for the temperature range of -25°C~85°C.
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