Working principle of carrier selective poly-Si/c-Si junctions: Is tunnelling the whole story?

We present arguments that additional effects besides laterally homogenous tunnelling might occur in carrier-selective poly-Si/c-Si junctions: (i) the symmetrical electrical behaviour of n+ and p+ poly-Si/c-Si junctions, (ii) direct observation of structural modifications of the interfacial oxide upon thermal treatment by transmission electron microscopy, even for poly-Si/c-Si junctions with good passivation quality, and (iii) the achievement of low junction resistances even for interfacial oxide thicknesses >2 nm after thermal treatment. We present an alternative picture, essentially based on a localized current flow through the interfacial oxide, mediated either by local reduction of the oxide layer thickness or by pinholes. In consequence, the local current flow implies transport limitations for both minority and majority carriers in the c-Si absorber, and thus a correlation between recombination current and series resistance. Thus, a poly-Si/c-Si junction can also be explained within the framework of a classical pn junction picture for a passivated, locally contacted emitter, e.g. by the model of Fischer. Both electron selective contacts (n+ poly-Si) and hole selective contacts (p+ poly-Si) can be described consistently when using reasonable input parameters. Especially for p+ poly-Si/c-Si junctions, our model could guideline further improvement.