A 9Mb HZO-Based Embedded FeRAM with 1012-Cycle Endurance and 5/7ns Read/Write using ECC-Assisted Data Refresh and Offset-Canceled Sense Amplifier

The growing demand for data and code storage has driven the development of emerging embedded nonvolatile memory (eNVM) technologies [1–6]. HZO-based $(\text{Hf}_{0.5}\text{Zr}_{0.5}0_{2})$ ferroelectric random-access memory (FeRAM) is a good candidate because of its high reliability, high speed, good scalability, and CMOS process compatibility [3], [4]. However, challenges still exist in designing robust read/write circuits for high endurance and improved sense margins. In this work, we present a 9-Mb (including ECC) HZO-based nonvolatile FeRAM chip aimed at mass scale production. A TiN/HZO/TiN ferroelectric capacitor (FeCAP) is integrated in the back-end-of-line of a 130nm CMOS process with a 700nm diameter capacitor and a mega-level capacity. A temperature-aware write-voltage driver, with ECC-assisted refresh (ECC-WD), is designed to improve the endurance of FeCAP. The offset-canceled sense amplifier is designed to tolerate a small BL signal margin and to reduce the read bit-error rate (BER). Measurement results show a $2\times$ remnant polarization $(\mathrm{P}_{\mathrm{R}}) > 30\mu\mathrm{C}/\text{cm}^{2}, \mathrm{a} > 10^{12}$ -cycle endurance, a 7ns write and a 5ns read time, a sub-3V operating voltage, and 10-year data retention at $85^{\circ}\mathrm{C}$ .