3.8 A 0.954nW 32kHz Crystal Oscillator in 22nm CMOS with Gm-C-Based Current Injection Control

Ultra-low-power (ULP) crystal oscillators (X0s) [1–5] are essential in wirelessly linked loT nodes: for time-keeping purposes, they need to consume low power since they stay always-on and remain accurate to reduce synchronization guard time [6]. In recent years, pulse-injection-based X0s (PIX0s) have gained attention for their nW-level low power with good frequency stability. Typically implemented with a classic pierce oscillator for startup, these designs aim to take over the established parallel oscillation and replenish only the energy loss in the crystal by injecting short current pulses at the oscillating nodes' voltage peaks and valleys. They promise lower power consumption since they don't rely on a small-signal negative resistance that requires a high static bias current, seen as the crossbar current in the inverter. Yet to design these PIX0s, the designers must face two challenges, as shown in Fig. 3.8.1. The first is the timing control for the injected current pulses. Setting the rising zero-crossing point of the oscillating waveform as the $0^\circ$ phase reference (or 0 in time), this scheme requires a positive current push at $90^{\circ}$ (or T/4) and a negative current pull at $270^{\circ}$ (or 3T/4). Misalignments in timing create an orthogonal current component disrupting the phase, translating noise in the circuit to jitter while reducing the energy efficiency to maintain the same oscillation amplitude. The second challenge is oscillation amplitude control. For ultra-low-power operation, the oscillation amplitude needs to be low but stable since a linear increase in the oscillation amplitude leads to quadratic power consumption to compensate for the loss in the crystal.