带隙基准
调节器
功率消耗
电压调节器
电压
功率(物理)
电路设计
带隙
电气工程
工程类
电子工程
计算机科学
拓扑(电路)
跌落电压
物理
光电子学
化学
生物化学
量子力学
基因
作者
Jan Grobe,Michael Hanhart,Fabian Maul,Léon Weihs,Leo Rolff,Ralf Wunderlich,Stefan Heinen
标识
DOI:10.1109/icecs49266.2020.9294922
摘要
This paper presents an integrated 24 V undervoltage-lockout (UVLO) design based on a ±0.78 % accuracy 77 dB supply rejection bandgap reference and utilizing a dedicated pre-regulator. The design features a high number of inputs with minimum additional space. The switching thresholds have a nominal accuracy over temperature of 1.1 %. The power consumption at 10 V is 119μW and the circuit occupies a die area of 0.15 mm 2 . This circuit is implemented in a 0.18 μm BCD technology.
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