Design of a time to digital converter for LGAD detector at HIAF complex

Abstract The High-Intensity Heavy-ion Accelerator Facility (HIAF) is a leading platform for heavy-ion scientific research in China with advanced beam current indicators. In these experiments, Low-Gain Avalanche Detectors (LGAD) have become the detector of choice, and the readout circuit of LGAD requires time-to-digital converters (TDC) to convert the time measurement results into digital signals. Since a smaller pixel area is conducive to improving positional resolution and spatial resolution, a TDC using calibration modules instead of delay-locked loops (DLLs) is proposed to achieve lower power consumption and area. The proposed TDC is a 3-stage architecture, reaching an extensive dynamic range and a high resolution. In addition, calibration modules are used to measure the relationship between two adjacent stages of resolution. Thus, the resolution of the TDC could be confirmed under the influence of process, voltage, temperture (PVT) variation. Compared with the TDCs using DLLs, the proposed TDC reduces the power consumption and area. The resolution of the proposed TDC is about 5.13 ps, and the dynamic range is 25.2 ns. The integral nonlinearity (INL) and the differential nonlinearity (DNL) are both less than 0.3 least significant bit (LSB). Including two TDCs, which measure the time of arrival (TOA) and the time of threshold (TOT), respectively, the layout area is 931 μm × 447 μm