The development of fine-linewidth semiconductor manufacturing process imposes additional requirements on the design optimization. This paper proposes and validates a simulation driven design methodology for structural design optimization of chip package integration. Finite Element Analysis method is employed to perform stress simulation for chip packages and then serves as a training dataset generator for machine learning model development. The effects of chip design parameters on the first principal stress are studied. Multiple machine learning algorithms are applied and evaluated as surrogate models for stress prediction. The random forest algorithm is identified to have the best capability to perform stress prediction for chip package integration design.