Utilizing Single Scan and Enhanced Design-Based Binning Methodologies for Improved Process Window and Hotspot Discovery

Semiconductor yield improvement and stability is becoming increasingly more difficult to achieve with decreasing technology nodes. There are many new sources, types, and mechanisms of process induced systematic defects, with a growing demand to identify and control those sources of hotspots that impact yield with the most comprehensive results, fastest time, and lowest cost. Previously there has been extensive characterization and publications on the techniques used for hotspot discovery, with little overall improvement to the flow and time to results needed to keep up with today's fast paced development process which requires rapid results. We propose implementing new inspection and binning algorithms to the process window discovery methodology, to achieve improvements in time to results, process window qualification, and hotspot identification. These systematic defect discovery improvements enable lithography processes to be controlled and monitored more accurately and more precisely than ever before.