锁相环
控制理论(社会学)
同步(交流)
转换器
电压源
参数统计
断层(地质)
MATLAB语言
计算机科学
理论(学习稳定性)
网格
电压
拓扑(电路)
工程类
电子工程
数学
控制(管理)
电气工程
抖动
统计
几何学
人工智能
地震学
机器学习
地质学
操作系统
作者
Yingbiao Li,Chensheng Lin,Jiabing Hu,Jianbo Guo
标识
DOI:10.1109/tec.2022.3185667
摘要
This paper investigates the phase-locked loop (PLL) synchronization stability of grid-connected voltage source converters (VSCs) under asymmetric ac faults. Negative sequence current control has been widely adopted to enhance the stability under asymmetric ac faults and the PLL plays a vital role in the maintenance of synchronization in VSCs. However, the positive and negative sequence current both have an important effect on the synchronization stability of PLL under asymmetric ac faults. Furthermore, the influence of negative sequence current and circuit parameters on PLL synchronization stability is different under different asymmetric ac fault types, which further increases the complexity of analysis. Hence, the unified synchronization stability coefficient (SSC) is proposed to evaluate synchronization stability of the VSC in this work. The parametric impacts of the PLL, the influence of positive/negative sequence current, and the circuit parameters on PLL synchronization stability are revealed analytically during asymmetric ac faults. Time-domain simulations are performed in Matlab/Simulink, and the obtained results validate the theoretical findings.
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