单晶硅
材料科学
薄脆饼
残余应力
硅
钻石
复合材料
压力(语言学)
应变计
冶金
光电子学
语言学
哲学
作者
Yan Wang,Bocheng Zhao,Jixing Li,Zhaofeng Qian,Shengju Huang,Jinhuan Su,Jing Zhou
标识
DOI:10.1007/s00170-022-09518-0
摘要
Monocrystalline silicon wafer is the most important raw material in chip manufacturing; wire sawing is the most common processing method of monocrystalline silicon wafer. The residual stress generated by cutting affects the subsequent polishing costs directly, as well as the fracture strength and mechanical integrity of the monocrystalline silicon wafer, thus affecting the service performance. In this paper, the generation mechanism of residual stress was analyzed based on diamond wire sawing technology. Then, based on Drucker-Prager (D-P) plastic constitutive model, the magnitude and distribution of residual stress of monocrystalline silicon chip under different process parameters were simulated by ABAQUS simulation software. Finally, the experiment of ultrasonic vibration–assisted diamond wire saw cutting monocrystalline silicon was conducted, and the residual stress of monocrystalline silicon chips were detected by blind hole method. During the detection, the strain values before and after drilling in three directions of monocrystalline silicon chips were measured by strain gauge rosette, and then the residual stress values were determined according to the strain values and the residual stress calculation theory. The experimental results showed that residual compressive stress remains on the surface of silicon wafer in both conventional wire sawing and ultrasonic vibration–assisted wire sawing. The residual compressive stress increases with the increase of the axial speed of wire saw, decreases with the increase of the wire saw feed speed, and fluctuates with the increase of the workpiece rotation speed. The residual compressive stress on the surface of the silicon wafer by ultrasonic vibration–assisted wire sawing is larger than that by conventional wire sawing. The simulation and experimental results have the same trend, which verifies the validity of the finite element model in this paper and provides theoretical support for the subsequent processing of single crystal silicon.
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