锁相环
PLL多位
控制理论(社会学)
瞬态(计算机编程)
同步(交流)
瞬态响应
循环(图论)
计算机科学
电子工程
工程类
控制(管理)
数学
电信
相位噪声
电气工程
操作系统
组合数学
频道(广播)
人工智能
作者
Jiahao Wang,Huan Pan,Chunning Na
出处
期刊:Lecture notes in electrical engineering
日期:2019-08-08
卷期号:: 233-245
被引量:1
标识
DOI:10.1007/978-981-13-9779-0_19
摘要
Phase-locked loop (PLL) is a vital technique for grid-connected inverters to achieve synchronization, and is requested to detect accurately the frequency and phase when inverters are synchronized. Moving average filter PLL (MAF-PLL) improves the filtering capability of synchronous reference frame PLL (SRF-PLL), but causes a phase delay of 180° in the PLL control loop, which affects the transient performance of MAF-PLL. To improve the transient response of the MAF-PLL, a phase-lead compensator (PLC) is cascaded in the MAF-PLL control loop to overcome shortcoming of MAF-PLL. The effectiveness of the proposed PLL is verified by simulation and numerical analysis.
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