符号
数学
算法
拓扑(电路)
材料科学
组合数学
算术
作者
Takaya Sugiura,Miura Hiroki,Nobuhiko Nakano
标识
DOI:10.1109/ted.2023.3244526
摘要
This article proposes an on- chip photovoltaic cell equipped with a tunnel oxide passivated contact (TOPCon) exhibiting selective carrier contact. The proposed structure utilizes the gate region as the TOPCon structure and performs best when the gate oxide is high- $\kappa $ hafnium oxide (HfO2). Oxide thicknesses lower than 1.5 nm enable the utilization of the device as a solar cell; therefore, it can be fabricated using high-end oriented CMOS processes. Furthermore, TOPCon technology at the bulk contact is observed to be more important than that at the emitter contact; however, a combination of the two yields an improved ${V}_{\text {OC}}$ value. On applying the full TOPCon technology, ${V}_{\text {OC}}$ is improved by approximately 20 mV from 601 to 619 mV, and $\eta $ is improved by approximately 0.5% from 15.20% to 15.73% compared to the conventional surface diffusion (SD)-based structure.
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