钝化
浅沟隔离
沟槽
CMOS芯片
计算机科学
电子工程
材料科学
光电子学
工程类
纳米技术
图层(电子)
作者
Samuel Tlemsani,Stéphane Ricq,Olivier Marcelot,Pierre Magnan
标识
DOI:10.1109/icmts59902.2024.10520689
摘要
Passivation techniques are mandatory to reduce the CMOS Image Sensors dark current from interfaces. In this work a general analysis methodology is proposed to study the Deep Trench Isolation field-effect passivation thanks to dedicated test structures. Two deep trench isolations are characterized: an electrically active trench and an innovative passive trench using charged Al2O3/SiO2 stacks. The results, validated by TCAD simulations, show that the best passivation is achieved here with the passive trench. Beyond, our approach is demonstrated to be a powerful tool for technologies and pixels developments with a fair passivation efficiency comparison through accumulation or inversion layer carrier concentrations. This work is also a first step toward dark current contribution modeling.
科研通智能强力驱动
Strongly Powered by AbleSci AI