Broadband Ka-band SPDT switch with 15 GHz bandwidth and 15.4 dBm IP1dB

This paper introduces the use of a pass-gate switch configuration to design and implement a 25-to-40 GHz single-pole double-throw (SPDT) switch in 130 nm BiCMOS technology. Also, biasing pass-gate transistor terminals to 0 V through 20 $\mathbf{K}\Omega$ resistance is introduced to minimize the variation in device parasitics. Performance improvements due to these design techniques have been benchmarked in the EM simulation of the proposed pass-gate switch configuration based differential SPDT switch. This SPDT switch has demonstrated minimum insertion-loss of 1.29 dB, maximum isolation of 41.2 dB and $\mathbf{S}_{11}/\mathbf{S}_{22}$ better than 12 dB across the frequency band of operation. This SPDT switch has also shown input PldB (IP1dB) of 15.4 dBm with a layout area of 0.11 mm ²