Lv4
520 积分 2022-09-27 加入
Modeling and analysis of digital linear dropout regulators with adaptive control for high efficiency under wide dynamic range digital loads
3天前
已完结
An Ultra-low-power Amplifier-less Potentiostat Design Based on Digital Regulation Loop
4天前
已完结
A 2-GS/s 200-MHz BW Oversampling Continuous-Time Pipeline ADC with Adaptive Digital Filter in 28nm
3个月前
已完结
A 1.8–65 fJ/Conv.-Step 64-dB SNDR Continuous- Time Level Crossing ADC Exploiting Dynamic Self-Biasing Comparators
3个月前
已完结
Design of a low power high speed flash ADC
3个月前
已完结
Flash ADC's low power, high speed dynamic comparator
3个月前
已完结
Dynamic Comparator Design for High Speed ADCs
3个月前
已完结
A 19 fJ/op, Low-Offset StrongARM Latch Comparator for Low-Power High-Speed Applications
3个月前
已完结
A Low-Power High-Speed Dynamic Comparator with Temperature Compensation
3个月前
已完结
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