Lv5
1265 积分 2021-06-04 加入
A 1.6-GHz dual modulus prescaler using the extended true-single-phase-clock CMOS circuit technique (E-TSPC)
1个月前
已完结
High speed and low power preset-able modified TSPC D flip-flop design and performance comparison with TSPC D flip-flop
1个月前
已完结
An 18 b 5 MS/s SAR ADC with 100.2 dB dynamic range
1个月前
已完结
A Three-Stage Comparator and Its Modified Version With Fast Speed and Low Kickback
3个月前
已完结
A 3.1 mW 8b 1.2 GS/s Single-Channel Asynchronous SAR ADC With Alternate Comparators for Enhanced Speed in 32 nm Digital SOI CMOS
3个月前
已完结
A Low-Power High-Speed Comparator for Precise Applications
3个月前
已完结
Non Inverting Differential Asymmetrical CMOS Comparator with Intrinsic Hysteresis and Adjustable Asymmetry
7个月前
已完结
A low — Voltage hysteresis comparator for low power applications
7个月前
已完结
A programmable dual hysteretic window comparator
7个月前
已完结
Hysteresis tunable FGMOS comparator
7个月前
已完结
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