Lv11
72 积分 2020-12-14 加入
28 Gbaud PAM-4 Burst-Mode CDR With Reconfigurable Sampling Scheme
58分钟前
已完结
PAM-4 Receiver With 1-Tap DFE Using Clocked Comparator Offset Instead of Threshold Voltages for Improved LSB BER Performance
14天前
已完结
A 56-Gbps PAM-4 Wireline Receiver With 4-Tap Direct DFE Employing Dynamic CML Comparators in 65 nm CMOS
14天前
已完结
Improving Linearity in CMOS Phase Interpolators
26天前
已完结
Calibration Techniques in Phased-Locked Loops: Theoretical basis and practical applications
27天前
已完结
A Fractional-N Digital LC-PLL Using Coupled Frequency Doubler With Frequency-Tracking Loop for Wireline Applications
1个月前
已完结
Improving Linearity in CMOS Phase Interpolators
2个月前
已完结
A 56-Gb/s PAM-4 Receiver Using Time-Based LSB Decoder and S/H Technique for Robustness to Comparator Voltage Variations
3个月前
已完结
A 100-Gb/s PAM-4 Optical Receiver With 2-Tap FFE and 2-Tap Direct-Feedback DFE in 28-nm CMOS
3个月前
已完结
A PAM-8 Wireline Transceiver With Linearity Improvement Technique and a Time-Domain Receiver Side FFE in 65 nm CMOS
3个月前
已完结
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