Lv2
130 积分 2023-05-11 加入
A 15 Gb/s Non-Return-to-Zero Transmitter With 1-Tap Pre-Emphasis Feed-Forward Equalizer for Low-Power Ground Terminated Memory Interfaces
9天前
已完结
An 8.7 mW/TX, 21 mW/RX 6-to-9GHz IEEE 802.15.4a/4z Compliant IR-UWB Transceiver with Pulse Pre-Emphasis achieving 14mm Ranging Precision
9天前
已完结
A 16/32-Gb/s/pin Dual-Mode Single-Ended Transmitter with Pre-Emphasis FFE and RLM-Enhanced ZQ Calibration for Memory Interfaces
9天前
已完结
7.9 An 8b 6-12GHz 0.18mW/GHz DC Modulated Ramp-Based Phase Interpolator in 65nm CMOS Process
1个月前
已完结
7.4 A 0.027mm2 5.6-7.8GHz Ring-Oscillator-Based Ping-Pong Sampling PLL Scoring 220.3fsrms Jitter and -74.2dBc Reference Spur
2个月前
已完结
A 2.4-GHz Multiphase Inductorless PLL With Coupled-Ring Oscillators and Time-Amplifying Phase–Frequency Detector for Low Phase Noise and Robust Locking Performances
2个月前
已完结
A 24.6-29.6GHz Hybrid Sub-Sampling PLL with Tri-State Integral Path Achieving 44fs Jitter and -254.8dB FOM in 28nm CMOS
6个月前
已完结
A 14 GHz Integer-N Sub-Sampling PLL With RMS-Jitter of 85.4 fs Occupying an Ultra Low Area of 0.0918 mm2
6个月前
已完结
A 4-to-16GHz Dual-Loop PLL Based on Current-Control RO and Calibration in a 6-nm FinFET
6个月前
已完结
A Fractional-N PLL for Multi-phase Clock Generation with Loop Bandwidth Enhancement
6个月前
已完结
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