三角积分调变
增量调制
计算机科学
西格玛
调制(音乐)
音频信号处理
电子工程
电气工程
音频信号
物理
语音识别
声学
电信
工程类
带宽(计算)
脉冲幅度调制
语音编码
量子力学
探测器
脉搏(音乐)
作者
Hou-Hsuan Lin,Jia-Fong Shih,Yung‐Hui Chung
标识
DOI:10.1109/isocc59558.2023.10396297
摘要
This work presents a second-order discrete-time (DT) delta-sigma modulator (DSM) for audio applications. Adding multiple feedforward paths in the cascade of integrators with feedback (FF-CIFB) topology can significantly reduce the integrator output swing. Thus, the proposed DSM architecture can effectively mitigate the dc gain of operational transconductance amplifiers used in the integrator. The prototype DT-DSM is fabricated in 180-nm CMOS technology and occupies an active area of 0.54 mm 2 . At 3.2-MS/s, this prototype ADC consumes $851 \mu \mathrm{W}$ from a 1.8-V supply. With an oversampling ratio of 64, the signal bandwidth is 25 kHz. Measured SNDR and SFDR are 89.3 dB and 102.5 dB, respectively. The measured dynamic range is 90 dB. The equivalent Schreier figure of merit (FOMs) is 163.9 dB.
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