德拉姆
动态随机存取存储器
电容器
电容
材料科学
泄漏(经济)
电气工程
制作
电子工程
光电子学
通用存储器
工程类
半导体存储器
电压
电极
计算机存储器
物理
宏观经济学
病理
经济
量子力学
内存刷新
替代医学
医学
作者
Seongun Shin,Gyu-Han Yoon,Woo Young Choi
出处
期刊:Journal of Semiconductor Technology and Science
[The Institute of Electronics Engineers of Korea]
日期:2019-04-30
卷期号:19 (2): 208-213
被引量:5
标识
DOI:10.5573/jsts.2019.19.2.208
摘要
The influence of etch profiles on leakage current and capacitance of three-dimensional (3-D) dynamic random access memory (DRAM) storage capacitors is investigated by using full 3-D technology computer-aided design (TCAD) simulation. According to the simulation results calibrated by experimental data, as the ratio of bottom critical dimension (CDBOT) to top critical dimension (CDTOP) of a DRAM storage capacitor decreases, storage capacitance (Cs) decreases while leakage current (Ileak) increases. Thus, it is important to achieve steep etch profiles during the fabrication of DRAM storage capacitors for higher DRAM capacity and longer refresh time.
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