期刊:IEEE Transactions on Components, Packaging and Manufacturing Technology [Institute of Electrical and Electronics Engineers] 日期:2021-11-08卷期号:11 (12): 2055-2060被引量:24
标识
DOI:10.1109/tcpmt.2021.3126083
摘要
In semiconductor foundries, wafer map defect analysis is crucial to prevent yield excursion. However, traditional manual inspection can hardly meet the high-throughput demand. Deep learning-based automatic defect detection shows promising efforts to achieve high accuracy and efficiency, yet the current approaches' performance is limited by the imbalanced dataset and lack of interpretability. In this article, we propose a variational autoencoder-enhanced deep learning model (VAEDLM) for wafer defect imbalanced classification. It is light-weighted and effective in wafer defect pattern recognition on imbalanced dataset. It used variational autoencoders (VAEs) and decoders to generate similar wafer defect maps and a refined deep convolutional neural network (CNN) for feature learning. We demonstrate the method using an authentic wafer map dataset, WM-811K. The performance is not only significantly improved after data augmentation, but it also beats the state-of-the art methods, reaching 99.19% accuracy, 99.10% recall, 99.23% precision, 99.96% AUC, and 99.16% for F1-score. It clearly demonstrates the method's efficacy to deal with the imbalanced defect pattern. Our study using saliency map and t-distributed stochastic neighbor embedding (t-SNE) further leads to enhanced interpretability.