Loss Analysis and Engineering of Spoof Surface Plasmons Based on Circuit Topology

We propose to systematically investigate the loss mechanism in spoof surface plasmon transmission lines (SSP-TLs) associated with surface-mounted resistors, by numerical simulation and circuit topology modeling, with the experimental validations. Distorted dispersion and loss curves introduced by the resistors are simultaneously predicted by the numerical results and interpreted by the circuit topology model. Attenuators constructed by periodically loaded resistors and T-type networks are designed according to the circuit topology model, and validated by both simulation and experiment results; hence, significant and controllable losses are achieved in a deep-subwavelength scale. The proposed structures and methods enable insightful understanding of the SSP-TLs and hold promise in other lossy SSP device study and design.