Integration of Hafnium Oxide on Epitaxial SiGe for p-type Ferroelectric FET Application

Increasing demands for new computer architectures may require embedded non-volatile memories as for example in-memory computing. Ferroelectric field-effect transistors (FeFETs) add further advantages besides their outstanding properties due to the availability of both n-type and p-type transistors. The latter favor a different channel materials, like SiGe, due to the low hole mobility in silicon. In this article, we demonstrate the integration of ferroelectric hafnium oxide on SiGe as well as working p-type FeFETs, possessing a large memory window of about 1.1 V and low variability. Such architectures were co-integrated into a standard high-k metal gate (HKMG) CMOS platform. Furthermore, we report on the impact of annealing temperature on the interface and ferroelectric layer, which appears to be universal for SiGe and Si substrates. Here, a growth of the interface layer during annealing at higher temperatures was observed as well as a reduction of the wake-up effect for the ferroelectric layer.