电阻器
温度系数
抖动
电气工程
晶体振荡器
计算机科学
补偿(心理学)
电子工程
物理
工程类
电压
谐振器
精神分析
心理学
作者
Jean Jung,Seunghyun Oh,Joo-Myoung Kim,Gihyeok Ha,Jinhyeon Lee,Seung-Jin Kim,Euiyoung Park,Jae‐Hoon Lee,Yelim Yoon,Seungyong Bae,Wonkang Kim,Yong Lim,Kyungsoo Lee,Junho Huh,Jongwoo Lee,Thomas Byunghak Cho
标识
DOI:10.1109/isscc42614.2022.9731781
摘要
The conventional cellular mobile device needs a tens-of-MHz main crystal oscillator (XO) and 32.768kHz real-time clock (RTC) XO for RF ultra-low-jitter PLLs and sleep operation, respectively. To minimize BoM cost and PCB area by reducing the number of crystals, the low-power main XO with a fractional divider (DIV.) in [1] is reported for the RTC. However, the high-power-consuming start-up operation for high-Q-factor main XO is inevitable. The on-chip RC oscillator (RCO) can be an alternative to the RTC XO due to its compact area and excellent stability over process, voltage, and temperature (PVT) variation. To improve the temperature sensitivity of the RCO, the two-point trimming using the resistors having the opposite temperature coefficient (TC) is employed in [2], but the accuracy is limited to 20ppm/ºC due to the $1^{\text{st}}$ -order compensation. The RCOs using high-resolution temperature-sensor units (TSUs) in [3], [4] can improve the TC up to <10ppm/ºC. However, the TSU requires a large area and an external FPGA to address complex digital signals. In addition, the previous approaches of [2]–[4] can be applied only to the limited processes providing a negative TC resistor. The main XO should accomplish ultra-low jitter for the RF PLLs (i.e $< 100{\text{fs}}_{\text{rms}})$ , but it causes long start-up time due to a large swing of the XO. Consequently, the system stand-by power is increased. Although a precisely timed energy injection in [5] can effectively reduce the start-up time, it is only applicable when the clock swing is small (0.32V). The 2-step injection technique [6] can improve the start-up time of the XO close to the theoretical limit even with large swing, but the short-circuit current of the buffer for a reference clock of the PLL restricts the start-up energy reduction (3.4×).
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