Suppression of Dislocations in DRAM STI Structure

德拉姆 材料科学 光电子学
作者
Bonhwi Gu,Injae Bae,Dong-Sik Park,Byoungdeog Choi
出处
期刊:IEEE Transactions on Electron Devices [Institute of Electrical and Electronics Engineers]
卷期号:71 (7): 4411-4414
标识
DOI:10.1109/ted.2024.3407032
摘要

During the manufacturing of dynamic random access memory (DRAM), the silicon active region may be bent or torn under stress, resulting in critical reliability failures. Several studies have been conducted to identify the stress factors that affect the Si crystal structure. Stress factors that particularly cause Si dislocation defects include the depth of the shallow trench isolation (STI), design rule conditions (size of the Si active region and ratio of the STI width), and characteristics of flowable silicon oxide (FSi $_{\textit{x}}$ O $_{\textit{y}}\text{)}$ (temperature dependency) and silicon oxide (Si $_{\textit{x}}$ O $_{\textit{y}}\text{)}$ films (thickness). Even when a product was designed considering the above factors, intermittent defects still occurred. Through simulations and structural analyses, we discovered that the tensile stress caused by silicon nitride (Si $_{\textit{x}}$ N $_{\textit{y}}\text{)}$ was a factor in the Si dislocation defects and proposed design rules related to this. To prevent Si dislocations, we prohibited certain design conditions (a certain STI width mainly filled with Si $_{\textit{x}}$ N $_{\textit{y}}\text{)}$ . Consequently, no Si dislocation defects occurred in wafers that satisfied the conditions we suggested. This experiment was performed with Samsung Electronics' 18-nm node DRAM.
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