CMOS芯片
击穿电压
电压
光电子学
电子工程
计算机科学
电气工程
材料科学
工程类
作者
Jau-Yang Wu,Chun-Hsien Liu
出处
期刊:IEEE Photonics Journal
日期:2024-04-01
卷期号:16 (2): 1-8
标识
DOI:10.1109/jphot.2024.3361732
摘要
We have proposed a structural design for a single photon avalanche diode with a low breakdown voltage. This diode is fabricated using Taiwan Semiconductor Manufacturing Company (TSMC) 0.18 μm HV CMOS technology, and it can maintain a high operating excess voltage in an n-on-p design without requiring any additional customized well layers. The n-on-p type device is particularly advantageous for a 3D-stacked backside illuminated structure and offers excellent photon detection capabilities at longer wavelengths. By incorporating a high doping concentration PDD well layer, we can significantly increase the excess bias, resulting in enhanced photon detection probability in the near-infrared wavelength range, all while maintaining a lower voltage due to a reduction in breakdown voltage. This design also leads to power consumption savings. As a result, our designed device is well-suited for consumer applications such as 3D image rendering and Lidar technology.
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