Soi Jeong,Changhyeon Han,Jiyong Yim,Jeonghan Kim,Ki Ryun Kwon,Sangwoo Kim,Eun Chan Park,Ji Won You,Rino Choi,Daewoong Kwon
出处
期刊:IEEE Electron Device Letters [Institute of Electrical and Electronics Engineers] 日期:2023-03-23卷期号:44 (5): 749-752被引量:6
标识
DOI:10.1109/led.2023.3260860
摘要
Double-gate ferroelectric thin-film transistor (DG-FeTFT) with an amorphous indium–gallium–zinc oxide ( $\alpha $ -IGZO) channel is demonstrated. DG-FeTFT is composed of all-sputter-deposited thin films and the bottom FeTFT (FeTFT $_{\text {bottom}}{)}$ and top conventional TFT (TFT $_{\text {top}}{)}$ are combined into a single device that shares the $\alpha $ -IGZO channel and source/drain. Through the separation of read (by TFT $_{\text {top}}{)}$ and program/erase (by FeTFT $_{\text {bottom}}{)}$ operations, it is confirmed that wide memory window (MW) of $\sim $ 5V is obtained with an MW amplification and read disturbance can be significantly improved. Furthermore, it is verified that faster program/erase speeds are achievable by modulating the gate voltage of TFTtop, leading to the improved endurance characteristics.