Analysis of DRAM Standby Current Failure due to Hot Electron Induced Punch-through (HEIP) of PMOS transistor

Abstract A standby current failure of the 80nm design-ruled Dynamic Random Access Memory (DRAM) during burn-in stress was investigated. In our case, hot electron induced punch-through (HEIP) of a PMOS transistor was a leakage current source. The bake test is a useful method to identify the mechanism of a standby current failure due to hot carrier degradation.