脑-机接口
收发机
脑电图
计算机科学
放大器
无线
计算机硬件
电信
神经科学
带宽(计算)
心理学
作者
Jaehyuk Lee,Kyoung-Rog Lee,Unsoo Ha,Ji-Hoon Kim,Kwonjoon Lee,Hoi‐Jun Yoo
标识
DOI:10.1109/vlsic.2018.8502263
摘要
In-ear brain-computer interface (BCI) controller system is implemented with a dedicated SoC including EEG readout and body channel communication (BCC) transceiver (TRX). The 8mm 2 chip is fabricated using 65nm CMOS and contains 3 key features, 1) current reusing LNA (CRLNA) for low power, 2) bootstrapping DC servo loop (BDSL) enabling low noise measurement even on 350mV electrode DC offset (EDO), and 3) dual mode PGA (DMPGA) that reduces TRX power consumption by activating only when the intentional wink is present. EEG IA shows the state-of-the-art 8.8 power efficiency factor (PEF) performance, and the entire IC consumes 82.9μW. From the measurement with 9 subjects, proposed BCI system accomplished 84% average accuracy for the binary selection task.
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