Variability and Yield in h‐BN‐Based Memristive Circuits: The Role of Each Type of Defect

Abstract In the race of fabricating solid‐state nano/microelectronic devices using 2D layered materials (LMs), achieving high yield and low device‐to‐device variability are the two main challenges. Electronic devices that drive currents in‐plane and homogeneously along the 2D‐LMs (i.e., transistors, memtransistors) are strongly affected by local defects (i.e., grain boundaries, wrinkles, thickness fluctuations, polymer residues), as they create inhomogeneities and increase the device‐to‐device variability, resulting in a poor performance at the circuit level. Here, it is shown that memristors are insensitive to most types of defects in 2D‐LMs, even when fabricated in academic laboratories that do not meet industrial standards. The reason is that the currents produced in these devices, which flow out‐of‐plane across the 2D‐LM, are always driven locally by the most conductive locations. Consequently, it is concluded that it is much easier to fabricate 2D‐LMs‐based solid‐state nano/microelectronic circuits using memristors than using transistors or memtransistors, not only due to the inherent simpler fabrication process (i.e., less lithography steps) but also because the local defects do not degrade the yield and variability of memristors considerably.