A 9-Mb HZO-Based Embedded FeRAM With 10-Cycle Endurance and 5/7-ns Read/Write Using ECC-Assisted Data Refresh and Offset-Canceled Sense Amplifier

Hf $_{0.5}$ Zr $_{0.5}$ O $_{2}$ (HZO)-based ferroelectric random access memory (FeRAM) is a good candidate for the embedded nonvolatile memory (eNVM) applications because of its high reliability, high speed, good scalability, and process compatibility with logic large-scale integrated circuits (LSIs). However, challenges still exist in designing robust read/write circuits for high reliability and sufficient read yield. This work presents a 9-Mb (8 $+$ 1-Mb error correcting code (ECC)) HZO-based nonvolatile FeRAM chip with high-performance read and write peripheral circuits. A TiN/HZO/TiN ferroelectric capacitor (FeCAP) is integrated in the back-end-of-line of a 130-nm CMOS process with a 700-nm-diameter capacitor and a mega-level capacity. A temperature-aware ECC-assisted write driver (ECC-WD) is designed to improve the reliability and power efficiency of FeRAM. The offset-canceled sense amplifier (SA) and a dummy-based reference generator are designed to tolerate a small bitline (BL) signal margin and to reduce the read bit-error rate (BER). Measurement results show 2 $\times$ remnant polarization ( $P_{r}$ ) $>$ 30 $\mu $ C/cm $^{2}$ , $>$ 10 $^{12}$ -cycle endurance, 7-ns write and 5-ns read time, sub-3-V operating voltage, and 10-year data retention at 85 $^{\circ}$ C.