材料科学
薄膜晶体管
原子层沉积
阈值电压
图层(电子)
光电子学
薄膜
晶体管
分析化学(期刊)
活动层
场效应晶体管
纳米技术
电压
电气工程
化学
工程类
色谱法
作者
Shin-Ho Noh,Hyo-Eun Kim,Young-Ha Kwon,Nak‐Jin Seong,Kyu-Jeong Choi,Sung‐Min Yoon
出处
期刊:Journal of vacuum science and technology
[American Vacuum Society]
日期:2022-06-24
卷期号:40 (4)
被引量:4
摘要
Thin film transistors (TFTs) using In-Ga-Sn-O (IGTO) active channel layers, which were prepared by atomic-layer deposition (ALD) techniques, were fabricated and characterized with exploring the optimum IGTO channel compositions and the process conditions for the formation of gate-stack structures. The introduction of an O3 oxidant was confirmed to secure a wider process window, which was explained by hydrogen incorporation from the protection layer/gate insulator stacked layers into the IGTO active channel. The cationic compositions of the IGTO thin films were controlled by subcyclic ratio design of each precursor. When the number of In-Ga precursor subcycles increased from 4 to 6, the Ga/Sn ratio increased from 3.5 to 4.0, leading to marked improvements in the VON characteristics of the fabricated IGTO TFTs. It was found from a comparative analysis on the device characteristics that the Ga/Sn ratio in the IGTO channel had a more dominant effect on the VON characteristics rather than the In/Ga ratio. The device using the channel with a cationic composition of 5.8:4.0:1.0 (In:Ga:Sn) exhibited the field-effect mobility of 19.1 cm2/V s, the subthreshold swing of 0.22 V/dec, and the threshold voltage (VTH) of 0.22 V, which corresponded to the best device characteristics among the fabricated devices. Furthermore, the VTH shifts were examined to be +0.4 and −0.4 V in positive and negative bias stress conditions, respectively, demonstrating excellent gate-bias stress stabilities. The obtained results suggest the device feasibility and fabrication process validity for the TFT applications using IGTO active channel layers prepared by ALD techniques.
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