MOSFET
电气工程
材料科学
结温
电感
功率密度
印刷电路板
半桥
模具(集成电路)
碳化硅
电源模块
功率(物理)
光电子学
电压
工程类
电容器
晶体管
物理
复合材料
量子力学
纳米技术
作者
Jack Knoll,Gibong Son,Christina DiMarino,Qiang Li,Hannes Stahr,Mike Morianz
出处
期刊:IEEE Transactions on Power Electronics
[Institute of Electrical and Electronics Engineers]
日期:2022-10-01
卷期号:37 (10): 11927-11936
被引量:14
标识
DOI:10.1109/tpel.2022.3177369
摘要
This article presents the design and analysis of a double-side-cooled printed circuit board (PCB) embedded silicon carbide (SiC) MOSFET half-bridge package with low loop inductances and an integrated gate driver. The 1.2 kV SiC MOSFET dies used in the half-bridge package are embedded in the PCB using AT&S's patented technique. The dies are cooled and electrically connected to traces in the PCB through copper-filled microvias. The design methodology accounts for both electrical and thermal performance, limiting the power-loop inductance to 2.3 nH and the maximum package temperature to less than the 175 °C limit. The integration of the gate drive circuitry allows for a high power density and 2.2 nH gate-loop inductances. At 0.12 K/W, the measured junction-to-case thermal resistance with double-sided cooling is 57% lower than that of a TO-247 package. Under similar operating conditions, the PCB-embedded half-bridge package also achieves a 5.6 times lower voltage overshoot and a 0.5% higher peak efficiency than a TO-247-based half-bridge. This article reports the first demonstration of PCB-embedded 1.2 kV SiC MOSFET packages in buck, boost, and ac–dc converters. The prototype three-phase ac–dc converter for an electric vehicle on-board charger is composed of six PCB-embedded half-bridge packages and achieves an efficiency of 98.2% and a power density of 182 W/in 3 .
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