铜互连
材料科学
互连
电迁移
光电子学
生产线后端
电介质
薄板电阻
泄漏(经济)
电阻式触摸屏
阻挡层
图层(电子)
电气工程
纳米技术
复合材料
计算机科学
电信
宏观经济学
经济
工程类
作者
James J. Kelly,Jinai Chen,Huai Huang,C.‐K. Hu,E. Liniger,R. Patlolla,Brown Peethala,Praneet Adusumilli,H. Shobha,T. Nogami,T. Spooner,E. Huang,D. Edelstein,D. Canaperi,V. Kamineni,Frank W. Mont,S. Siddiqui
标识
DOI:10.1109/iitc-amc.2016.7507673
摘要
We characterize integrated dual damascene Co and Cu BEOL lines and vias, at 10 nm node dimensions. The Co to Cu line resistance ratios for 24 nm and 220 nm wide lines were 2.1 and 3.5, respectively. The Co via resistance was just 1.7 times that of Cu, with the smaller ratio attributed to the barrier layer series via resistance. Electrical continuity of Co via chain structures was good, while some chain-chain shorts and leakage suggests metal residuals from the Co polish process. The Co lines and vias, fabricated using conventional BEOL processes, exhibit good Co fill by TEM, with no visible evidence of Co in the dielectric. The relatively smaller resistance increase for Co vias suggests a potential via resistance benefit, a thinner or less resistive barrier can be employed. Co line resistance will likely not be competitive with Cu until after the next technology node.
科研通智能强力驱动
Strongly Powered by AbleSci AI