抖动
锁相环
重置(财务)
涟漪
CMOS芯片
滤波器(信号处理)
PLL多位
振幅
循环(图论)
低通滤波器
相位检测器
探测器
控制理论(社会学)
物理
电子工程
电压
计算机科学
电气工程
光电子学
光学
工程类
数学
组合数学
人工智能
经济
金融经济学
控制(管理)
作者
A. Maxim,Baker Scott,Edmund Mark Schneider,Melvin L. Hagge,S. Chacko,D. Stiurca
出处
期刊:International Solid-State Circuits Conference
日期:2001-02-05
被引量:23
标识
DOI:10.1109/isscc.2001.912689
摘要
This low-jitter high-resolution ripple-pole-less process-independent 0.18/spl mu/m CMOS PLL is based on a sample-reset loop filter technique. The key feature of this architecture is elimination of phase detector frequency spurs due to the ICO control current spikes during input phase difference. This is accomplished by averaging the charge injected by the proportional path over an entire input update period. As a consequence, the ICO control current has a shape characterized by a staircase of low amplitude steps, versus one characterized by narrow high amplitude pulses, and needs much less filtering for low-jitter operation.
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