On Gas-Phase Selective Dry Etching in 3D Inflections

Semiconductor industry periodically goes through major transitions in the architectures and materials. The previous such transition was the Logic transition to FinFET and NAND transition to 3DNAND that revolutionized the two devices and accelerated PPAC (power, performance, area, cost) progress. Over the last decade, introduction of EUV lithography has driven the device miniaturization and furthered the cause of PPAC, but with the same architecture. The accelerating technological needs at lower cost point with better power efficiency are driving the current push in fundamental architectural changes and new materials introductions, especially in Logic and DRAM with a transition to 3D structures. This moves the critical etches from traditional RIE to selective isotropic etching. Furthermore, newer materials and requirements of better interfaces in these 3D structures are driving the need for dry selective treatments with good isotropicity and free of damage. This paper will give an overview of the current state of selective dry etch and progress in treatments.