The Structural Performance of a Novel Double‐Stacked Heterogeneous Gate Heterojunction Tunneling Field‐Effect Transistor

In this work, an original Si/SiGe heterojunction tunneling field‐effect transistor which has a double‐stacked heterogeneous oxide gate (HfO 2 /Al 2 O 3 ) structure (DSG–HJ–TFET) is designed and investigated by Sentaurus technology computer aided design (TCAD) simulation software. To ensure good interface quality, a stacked oxide gate dielectric of Al 2 O 3 and HfO 2 is proposed. The on‐state current ( I on ) is increased though improving the carrier mobility degradation caused by the poor quality of interface between the high‐ κ dielectric and semiconductor. Moreover, a heterojunction with SiGe (source)/Si (channel) and pocket layer which is inserted between the source region and the channel is adopted to reduce the tunneling barrier and improve the I on . Therefore, the higher I on is obtained by the proposed DSG–HJ–TFET. In the simulation results, it is shown that I on of DSG–HJ–TFET is increased by three orders of magnitude compared with that of the conventional high‐ κ gate dielectric TFET structure. In addition, the off‐state current ( I off ) of 4.91 × 10 −11 μA μm −1 , the minimum subthreshold swing of 14 mV dec −1 , the I on /I off ratio of 1.13 × 10 12 , transconductance of 260 μS μm −1 , f T of 49.8 GHz, and gain bandwidth product ( GBW ) of 7.2 GHz are obtained. The propose DSG–HJ–TFET is favored in ultralow‐power applications for the rather good performance.